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www.fairchildsemi.com features devices are available in military (-55 c to +125 c) temperature range standard proms are offered in power-switched sprom versions typically, 75% power savings achieved by deselected sproms reliable nichrome fuses three-state outputs devices programmed on standard prom programmers high immunity or resistance to space levels of radiation device pinouts comply with jedec standards available in surface mount and through-hole packaging proms and sproms are offered in 24-pin, 0.3" wide dips applications microprogram control store microprocessor program store programmable logic custom look-up tables security encoding/decoding code converter character generator use in redundant systems description fairchild semiconductor electronics semiconductor divi- sions bipolar field programmable read-only memories include both standard and power-switched versions. cs/ps inputs provide logic ?xibility and ease of memory expan- sion decoding. sprom power-switch circuitry is activated by the ps input. fairchild semiconductor proms and sproms are manu- factured with nichrome fuses and low power schottky tech- nology. the devices are shipped with all bits in the high (logical one) state. to achieve a low state in a given bit location the nichrome link is fused open by passing a short, high current pulse through the link. all devices are pro- grammed using the same programming technique. standard proms are enabled by a single active low cs or by both active low cs and high cs inputs. power- switched proms (sproms) are enabled by a single active low ps or by both active low ps and high ps inputs. see the individual block diagrams for the enable scheme. r296xx/r297xx standard proms and power-switched sproms rev. 1.0.1
r296xx/r297xx product specification 2 absolute maximum ratings (above which the useful life may be impaired) operating conditions note: 1. tests shall be conducted at input test conditions as follows: v ih = v ih (min) +20%, ?%; v il = v il (max) +0%, ?0%. devices may be tested using any input voltage within this input voltage range but shall be guaranteed to v ih (min) and v il (max). caution: to avoid test correlation problems, the test system noise (e.g., testers, handlers, etc.) should be verified to assur e that v ih (min) and v il (max) requirements are not violated at the device terminals. 2. v il = 0.6v for chip select pins on all 29600 series devices. supply voltage to ground potential (continuous), v cc ?.5v to +7.0v dc input current ?0 ma to +5.0 ma dc input voltage (address inputs) ?.5v to +5.5v dc input voltage (chip/power select input pin) r296xx ?.5v to +33v r297xx ?.5v to +28v dc voltage applied to outputs (except during programming) ?.5v to +v cc max. output current into outputs during programming 240 ma dc voltage applied to outputs during programming r296xx 26v r297xx 24v junction temperature +175 c storage temperature ?5 c to +150 c programming temperature 25 5 c lead temperature (soldering, 10 seconds) 300 c current density (metallization) <5 x 10 5 a/cm 2 thermal resistance, junction-to-case q jc dual-ln-line 11 c/w leadless chip carrier 10 c/w flat pack 10 c/w military parameter description min. max. unit v cc supply voltage 4.5 5.5 v t c case operating temperature ?5 +125 c v il1 1, 2 dc low level input voltage 0.8 v v ih 1 dc high level input voltage 2.0 v v il ac/functional low level input voltage 0 v v ih ac/functional high level input voltage 3.0 v
product specification r296xx/r297xx 3 electrical characteristics (over operating range) devices conform to mil-std-883, group a, subgroups 1, 2 and 3. notes: 1. this characteristic cannot be tested prior to programming; it is guaranteed by factory testing. 2. not more than one output should be shorted at a time. duration of the short circuit should not exceed 1 second. 3. v out = 0.0v for r29791/r29793. pin de?itions parameter description conditions min. max. units v oh output high voltage v cc = min, i oh = -1.6 ma 2.4 v v in = v ih or v il v ol 1 output low voltage v cc = min, i ol = 8 ma 0.4 v v in = v ih or v il i ol = 16 ma 0.5 i il input low current v cc = max, v in = 0.4v r296xx -250 m a r297xx -100 i ih input high current v cc = max, v in = 2.7v 10 m a v cc = max, v in = 5.5v 40 i os 2 output short circuit current v cc = max, v out = 0.2v 3 -15 -85 ma v ic input clamp voltage v cc = min, i in = -18 ma -1.2 v i cex output leakage current v cc = max, v out = 5.5v +40 m a chip disabled v out = 0.4v -40 symbol description a 0 ? n address inputs cs chip select active low (prom) cs chip select active high (prom) ps chip select active low (sprom) ps chip select active high (sprom) o 1 ? n data outputs
r296xx/r297xx product specification 4 a 0 1 1 of 64 decoder 64 x 64 memory matrix 1 of 8 multiplexers (8) output drivers (8) 2 16 3 4 5 6 15 cs 7 8 9 11121314 17 18 19 a 1 a 5 a 2 a 3 a 4 a 6 a 7 a 8 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 20 19 18 17 16 15 14 13 12 11 v cc a 8 a 7 a 6 a 5 a 0 a 1 a 2 a 3 a 4 cs o 8 o 1 o 2 o 3 o 4 gnd o 7 o 6 o 5 12345678910 pin 15 is also the programming pin (pp) 512 x 8 prom?29621/r29621a power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information block diagram notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 20 lead ceramic dip pin assignments parameter description test conditions maximum limits units 29621am r29621m i cc power supply current v cc = max 155 155 ma all inputs gnd t aa 2 address access time c l = 30 pf 1 75 95 ns t ea 2 enable access time r1 = 300 w to v cc 50 50 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 40 40 ns p d power dissipation 853 853 mw part type package operating temperature range r29621dm d -55 c to +125 c r29621dm/883b d -55 c to+125 c r29621dms d -55 c to +125 c r29621adm d -55 c to +125 c r29621adm/883b d -55 c to +125 c r29621adms d -55 c to +125 c 20 lead ceramic dip
product specification r296xx/r297xx 5 512 x 8 sprom?29623/r29623a power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information block diagram notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 20 lead ceramic dip pin assignments parameter description test conditions maximum limits units 29623am r29623m i ccd power down, supply current (disabled) v cc = max ps = v ih , all other inputs = gnd 45 45 ma i cc supply current (enabled) v cc = max all inputs = gnd 155 155 ma t aa 2 address access time c l = 30 pf 1 75 100 ns t ea 2 enable access time r1 = 300 w to v cc 80 100 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 40 40 ns p d power dissipation (disabled) 248 248 mw p d power dissipation (enabled) 853 853 mw part type package operating temperature range r29623dm d -55 c to +125 c r29623dm/883b d -55 c to +125 c r29623dms d -55 c to +125 c r29623adm d -55 c to +125 c r29623adm/883b d -55 c to +125 c r29623adms d -55 c to +125 c a 0 1 1 of 64 decoder 64 x 64 memory matrix 1 of 8 multiplexers (8) output drivers (8) 2 16 3 4 5 6 15 ps 7 8 9 11121314 17 18 19 a 1 a 5 a 2 a 3 a 4 a 6 a 7 a 8 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 20 19 18 17 16 15 14 13 12 11 v cc pin 15 is also the programming pin (pp) a 8 a 7 a 6 a 5 a 0 a 1 a 2 a 3 a 4 ps o 8 o 1 o 2 o 3 o 4 gnd o 7 o 6 o 5 12345678910 20 lead ceramic dip
r296xx/r297xx product specification 6 1024 x 8 prom?29631/r29631a power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information block diagram notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 24 lead ceramic dip ?.600" body width f = 24 lead cerpack pin assignments parameter description test conditions maximum limits units 29631am r29631m i cc power supply current v cc = max 170 170 ma all inputs gnd t aa 2 address access time c l = 30 pf 1 75 105 ns t ea 2 enable access time r1 = 300 w to v cc 50 50 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 40 40 ns p d power dissipation 935 935 mw part type package operating temperature range r29631dm d -55 c to +125 c r29631dm/883b d -55 c to +125 c r29631dms d -55 c to +125 c r29631fm f -55 c to +125 c r29631fm/883b f -55 c to +125 c r29631fms f -55 c to +125 c r29631adm d -55 c to +125 c r29631adm/883b d -55 c to +125 c r29631afms d -55 c to +125 c r29631adm f -55 c to +125 c r29631afm/883b f -55 c to +125 c r29631afms f -55 c to +125 c 20 19 18 17 24 23 22 21 16 15 14 13 v cc pin 20 is also the programming pin (pp) a 8 a 9 a 5 a 7 a 6 a 4 a 3 a 2 a 1 o 7 o 8 cs 4 cs 3 cs 2 cs 1 a 0 o 1 o 2 o 3 gnd o 6 o 5 o 4 1 2 3 4 5 6 7 8 9 10 11 12 24 lead ceramic dip/24 lead cerpack a 4 4 1 of 64 decoder 64 x 128 memory matrix 1 of 16 multiplexers (8) output drivers (8) 3 2 8 7 6 9 21 20 19 18 cs 1 10 11 1314 15 16 17 1 23 22 a 5 a 6 a 0 a 1 a 2 5 a 3 a 7 a 8 a 9 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 cs 2 cs 3 cs 4
product specification r296xx/r297xx 7 1024 x 8 sprom?29633/r29633a power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information pin assignments notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 24 lead ceramic dip ?.600" body width f = 24 lead cerpack parameter description test conditions maximum limits units 29633am r29633m i ccd power down, supply current (disabled) v cc = max, ps = v ih , all other inputs = gnd 45 45 ma i cc supply current (enabled) v cc = max all inputs = gnd 170 170 ma t aa 2 address access time c l = 30 pf 1 85 105 ns t ea 2 enable access time r1 = 300 w to v cc 85 130 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 40 40 ns p d power dissipation (disabled) 248 248 mw p d power dissipation (enabled) 935 935 mw part type package operating temperature range r29633dm d -55 c to +125 c r29633dm/883b d -55 c to +125 c r29633dms d -55 c to +125 c r29633fm f -55 c to +125 c r29633fm/883b f -55 c to +125 c r29633fms f -55 c to +125 c r29633adm d -55 c to +125 c r29633adm/883b d -55 c to +125 c r29633adms d -55 c to +125 c r29633afm f -55 c to +125 c r29633afm/883b f -55 c to +125 c r29633afms f -55 c to +125 c a 4 4 1 of 64 decoder 64 x 128 memory matrix 1 of 16 multiplexers (8) output drivers (8) 3 2 8 7 6 21 20 19 18 ps 1 1 23 22 a 5 a 6 a 0 a 1 a 2 5 a 3 a 7 a 8 a 9 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 ps 2 ps 3 ps 4 9 10111314151617 block diagram 24 lead ceramic dip/24 lead cerpack 20 19 18 17 24 23 22 21 16 15 14 13 v cc pin 20 is also the programming pin (pp) a 8 a 9 a 5 a 7 a 6 a 4 a 3 a 2 a 1 o 7 o 8 ps 4 ps 3 ps 2 ps 1 a 0 o 1 o 2 o 3 gnd o 6 o 5 o 4 1 2 3 4 5 6 7 8 9 10 11 12
r296xx/r297xx product specification 8 2048 x 4 prom?29651/r29651a power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information block diagram notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 18 lead ceramic dip pin assignments parameter description test conditions maximum limits units 29651am r29651m i cc power supply current v cc = max 170 170 ma all inputs gnd t aa 2 address access time c l = 30 pf 1 85 105 ns t ea 2 enable access time r1 = 300 w to v cc 50 55 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 45 45 ns p d power dissipation 935 935 mw part type package operating temperature range r29651dm d -55 c to +125 c r29651dm/883b d -55 c to +125 c r29651dms d -55 c to +125 c r29651adm d -55 c to +125 c r29651adm/883b d -55 c to +125 c r29651adms d -55 c to +125 c 14 13 12 11 18 17 16 15 10 v cc pin 10 is also the programming pin (pp) a 7 a 8 a 4 a 6 a 5 a 3 a 0 a 1 a 2 cs o 4 o 3 o 2 o 1 a 9 a 10 gnd 123456789 18 lead ceramic dip a 5 2 1 of 64 decoder 64 x 128 memory matrix 1 of 32 multiplexers (4) output drivers (4) 1 17 5 6 7 cs 16 15 3 a 6 a 7 a 0 a 1 a 2 4 a 3 8 a 10 a 8 a 9 a 4 o 1 o 2 o 3 o 4 14 13 12 11 10
product specification r296xx/r297xx 9 2048 x 4 sprom?29653/r29653a power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information block diagram notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 18 lead ceramic dip pin assignments parameter description test conditions maximum limits units 29653am r29653m i ccd power down, supply current (disabled) v cc = max, ps = v ih , all other inputs = gnd 45 45 ma i cc supply current (enabled) v cc = max all inputs = gnd 170 170 ma t aa 2 address access time c l = 30 pf 1 90 105 ns t ea 2 enable access time r1 = 300 w to v cc 95 110 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 45 45 ns p d power dissipation (disabled) 248 248 mw p d power dissipation (enabled) 935 935 mw part type package operating temperature range r29653dm d -55 c to +125 c r29653dm/883b d -55 c to +125 c r29653dms d -55 c to +125 c r29653adm d -55 c to +125 c r29653adm/883b d -55 c to +125 c r29653adms d -55 c to +125 c 14 13 12 11 18 17 16 15 10 v cc pin 10 is also the programming pin (pp) a 7 a 8 a 4 a 6 a 5 a 3 a 0 a 1 a 2 ps o 4 o 3 o 2 o 1 a 9 a 10 gnd 123456789 18 lead ceramic dip a 5 2 1 of 64 decoder 64 x 128 memory matrix 1 of 32 multiplexers (4) output drivers (4) 1 17 5 6 7 ps 16 15 3 a 6 a 7 a 0 a 1 a 2 4 a 3 8 a 10 a 8 a 9 a 4 o 1 o 2 o 3 o 4 14 13 12 11 10
r296xx/r297xx product specification 10 2048 x 8 prom?29681/r29681a power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. parameter description test conditions maximum limits units 29681am r29681m i cc power supply current v cc = max 180 180 ma all inputs gnd t aa 2 address access time c l = 30 pf 1 85 120 ns t ea 2 enable access time r1 = 300 w to v cc 50 55 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 35 45 ns p d power dissipation 990 990 mw notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 24 lead ceramic dip ?.600" body width l = 28 terminal leadless chip carrier s = 24 lead sidebrazed ?.300" body width contact factory regarding flat pack package pin assignments block diagram part type package operating temperature range r29681dm d -55 c to +125 c r29681dm/883b d -55 c to +125 c r29681dms d -55 c to +125 c r29681lm l -55 c to +125 c r29681lm/883b l -55 c to +125 c r29681lms l -55 c to +125 c r29681sm s -55 c to +125 c r29681sm/883b s -55 c to +125 c r29681sms s -55 c to +125 c r29681adm d -55 c to +125 c r29681adm/883b d -55 c to +125 c r29681adms d -55 c to +125 c r29681alm l -55 c to +125 c r29681alm/883b l -55 c to +125 c r29681alms l -55 c to +125 c r29681asm s -55 c to +125 c r29681asm/883b s -55 c to +125 c r29681asms s -55 c to +125 c 20 19 18 17 24 23 22 21 16 15 14 13 v cc pin 24 is also the programming pin (pp) pin 20 is also the programming pin (pp) a 8 a 9 a 10 a 5 a 7 a 6 a 4 a 3 a 2 a 1 o 7 o 8 cs 3 cs 2 cs 1 a 0 o 1 o 2 o 3 gnd o 6 o 5 o 4 1 1 2 3 28 terminal leadless chip carrier 24 lead ceramic dip/24 lead sidebrazed 4 282726 nc a 7 a 6 a 5 v cc a 8 a 9 15 14 13 12 16 17 18 nc gnd o 3 o 2 o 4 o 5 o 6 5 6 7 8 9 10 11 a 4 a 3 a 2 a 1 a 0 nc o 1 25 24 23 22 21 20 19 a 16 cs 1 cs 2 cs 3 nc o 8 o 7 2 3 4 5 6 7 8 9 10 11 12 a 4 4 1 of 128 decoder 128 x 128 memory matrix 1 of 16 multiplexers (8) output drivers (8) 3 2 8 7 6 20 19 18 1 23 22 a 5 a 6 a 0 a 1 a 2 5 a 3 a 7 a 8 a 9 21 a 10 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 cs 1 cs 2 cs 3 9 10111314151617
product specification r296xx/r297xx 11 2048 x 8 sprom?29683/r29683a power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. parameter description test conditions maximum limits units 29683am r29683m i ccd power down, supply current (disabled) v cc = max, ps = v ih , all other inputs = gnd 50 50 ma i cc supply current (enabled) v cc = max all inputs = gnd 180 180 ma t aa 2 address access time c l = 30 pf 1 85 120 ns t ea 2 enable access time r1 = 300 w to v cc 100 125 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 45 50 ns p d power dissipation (disabled) 275 275 mw p d power dissipation (enabled) 990 990 mw notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 24 lead ceramic dip ?.600" body width l = 28 terminal leadless chip carrier s = 24 lead sidebrazed ?.300" body width contact factory regarding flat pack package pin assignments block diagram part type package operating temperature range r29683dm d -55 c to +125 c r29683dm/883b d -55 c to +125 c r29683dms d -55 c to +125 c r29683lm l -55 c to +125 c r29683lm/883b l -55 c to +125 c r29683lms l -55 c to +125 c r29683sm s -55 c to +125 c r29683sm/883b s -55 c to +125 c r29683sms s -55 c to +125 c r29683adm d -55 c to +125 c r29683adm/883b d -55 c to +125 c r29683adms d -55 c to +125 c r29683alm l -55 c to +125 c r29683alm/883b l -55 c to +125 c r29683alms l -55 c to +125 c r29683asm s -55 c to +125 c r29683asm/883b s -55 c to +125 c r29683asms s -55 c to +125 c 20 19 18 17 24 23 22 21 16 15 14 13 v cc pin 24 is also the programming pin (pp) pin 20 is also the programming pin (pp) a 8 a 9 a 10 a 5 a 7 a 6 a 4 a 3 a 2 a 1 o 7 o 8 ps 3 ps 2 ps 1 a 0 o 1 o 2 o 3 gnd o 6 o 5 o 4 1 1 2 3 28 terminal leadless chip carrier 24 lead ceramic dip/24 lead sidebrazed 4 282726 nc a 7 a 6 a 5 v cc a 8 a 9 15 14 13 12 16 17 18 nc gnd o 3 o 2 o 4 o 5 o 6 5 6 7 8 9 10 11 a 4 a 3 a 2 a 1 a 0 nc o 1 25 24 23 22 21 20 19 a 16 ps 1 ps 2 ps 3 nc o 8 o 7 2 3 4 5 6 7 8 9 10 11 12 a 4 4 1 of 128 decoder 128 x 128 memory matrix 1 of 16 multiplexers (8) output drivers (8) 3 2 8 7 6 20 19 18 1 23 22 a 5 a 6 a 0 a 1 a 2 5 a 3 a 7 a 8 a 9 21 a 10 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 ps 1 ps 2 ps 3 9 10111314151617
r296xx/r297xx product specification 12 4096 x 8 prom?29771 power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. parameter description test conditions maximum limits units R29771m i cc power supply current v cc = max 190 ma all inputs gnd t aa 2 address access time c l = 30 pf 1 85 ns t ea 2 enable access time r1 = 300 w to v cc 50 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 35 ns p d power dissipation 1.05 mw notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 24 lead ceramic dip ?.600" body width f = 24 lead leadless chip carrier l = 28 terminal leadless chip carrier s = 24 lead sidebrazed ?.300" body width pin assignments block diagram part type package operating temperature range R29771dm d -55 c to +125 c R29771dm/883b d -55 c to +125 c R29771dms d -55 c to +125 c R29771fm f -55 c to +125 c R29771fm/883b f -55 c to +125 c R29771fms f -55 c to +125 c R29771lm l -55 c to +125 c R29771lm/883b l -55 c to +125 c R29771lms l -55 c to +125 c R29771sm s -55 c to +125 c R29771sm/883b s -55 c to +125 c R29771sms s -55 c to +125 c 20 19 18 17 24 23 22 21 16 15 14 13 v cc pin 24 is also the programming pin (pp) pin 20 is also the programming pin (pp) a 8 a 9 a 10 a 5 a 7 a 6 a 4 a 3 a 2 a 1 o 7 o 8 cs 2 a 11 cs 1 a 0 o 1 o 2 o 3 gnd o 6 o 5 o 4 1 1 2 3 28 terminal leadless chip carrier 24 lead ceramic dip/24 lead leaded chip carrier/24 lead sidebrazed 4 282726 nc a 7 a 6 a 5 v cc a 8 a 9 15 14 13 12 16 17 18 nc gnd o 3 o 2 o 4 o 5 o 6 5 6 7 8 9 10 11 a 4 a 3 a 2 a 1 a 0 nc o 1 25 24 23 22 21 20 19 a 16 cs 1 a 11 cs 2 nc o 8 o 7 2 3 4 5 6 7 8 9 10 11 12 a 5 3 1 of 128 decoder 128 x 256 memory matrix 1 of 32 multiplexers (8) output drivers (8) 2 1 8 7 6 20 18 23 22 21 a 6 a 7 a 0 a 1 a 2 5 a 3 4 a 4 a 8 a 9 a 10 19 a 11 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 cs 1 cs 2 9 10111314151617
product specification r296xx/r297xx 13 4096 x 8 sprom?29773 power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. parameter description test conditions maximum limits units r29773m i ccd power down, supply current (disabled) v cc = max, ps = v ih , all other inputs = gnd 55 ma i cc supply current (enabled) v cc = max all inputs = gnd 190 ma t aa 2 address access time c l = 30 pf 1 85 ns t ea 2 enable access time r1 = 300 w to v cc 135 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 35 ns p d power dissipation (disabled) 303 mw p d power dissipation (enabled) 1.05 w notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 24 lead ceramic dip ?.600" body width f = 24 lead leaded chip carrier l = 28 terminal leadless chip carrier s = 24 lead sidebrazed ?.300" body width pin assignments block diagram part type package operating temperature range r29773dm d -55 c to +125 c r29773dm/883b d -55 c to +125 c r29773dms d -55 c to +125 c r29773fm f -55 c to +125 c r29773fm/883b f -55 c to +125 c r29773fms f -55 c to +125 c r29773lm l -55 c to +125 c r29773lm/883b l -55 c to +125 c r29773lms l -55 c to +125 c r29773sm s -55 c to +125 c r29773sm/883b s -55 c to +125 c r29773sms s -55 c to +125 c 20 19 18 17 24 23 22 21 16 15 14 13 v cc pin 24 is also the programming pin (pp) pin 20 is also the programming pin (pp) a 8 a 9 a 10 a 5 a 7 a 6 a 4 a 3 a 2 a 1 o 7 o 8 ps 2 a 11 ps 1 a 0 o 1 o 2 o 3 gnd o 6 o 5 o 4 1 1 2 3 28 terminal leadless chip carrier 24 lead ceramic dip/24 lead leaded chip carrier/ 24 lead sidebrazed 4 282726 nc a 7 a 6 a 5 v cc a 8 a 9 15 14 13 12 16 17 18 nc gnd o 3 o 2 o 4 o 5 o 6 5 6 7 8 9 10 11 a 4 a 3 a 2 a 1 a 0 nc o 1 25 24 23 22 21 20 19 a 16 ps 1 a 11 ps 2 nc o 8 o 7 2 3 4 5 6 7 8 9 10 11 12 a 5 3 1 of 128 decoder 128 x 256 memory matrix 1 of 32 multiplexers (8) output drivers (8) 2 1 8 7 6 20 18 23 22 21 a 6 a 7 a 0 a 1 a 2 5 a 3 4 a 4 a 8 a 9 a 10 19 a 11 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 ps 1 ps 2 9 10111314151617
r296xx/r297xx product specification 14 8192 x 8 prom?29791 power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information block diagram notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 24 lead ceramic dip ?.600" body width f = 24 lead leaded chip carrier s = 24 lead sidebrazed ?.300" body width pin assignments parameter description test conditions maximum limits units r29791m i cc power supply current v cc = max, all inputs gnd 190 ma t aa 2 address access time c l = 30 pf 1 95 ns t ea 2 enable access time r1 = 300 w to v cc 50 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 30 ns p d power dissipation 1.05 w part type package operating temperature range r29791dm d -55 c to +125 c r29791dm/883b d -55 c to +125 c r29791dms d -55 c to +125 c r29791fm f -55 c to +125 c r29791fm/883b f -55 c to +125 c r29791fms f -55 c to +125 c r29791sm s -55 c to +125 c r29791sm/883b s -55 c to +125 c r29791sms s -55 c to +125 c 20 19 18 17 24 23 22 21 16 15 14 13 v cc pin 20 is also the programming pin (pp) a 8 a 9 a 10 a 5 a 7 a 6 a 4 a 3 a 2 a 1 o 7 o 8 a 12 a 11 cs a 0 o 1 o 2 o 3 gnd o 6 o 5 o 4 1 24 lead ceramic dip/24 lead leaded chip carrier/ 24 lead sidebrazed 2 3 4 5 6 7 8 9 10 11 12 a 5 3 1 of 256 decoder 256 x 256 memory matrix 1 of 32 multiplexers (8) output drivers (8) 2 1 8 7 6 20 23 22 21 a 6 a 7 a 0 a 1 a 2 5 a 3 4 a 4 a 8 a 9 a 10 19 a 11 18 a 12 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 cs 9 10111314151617
product specification r296xx/r297xx 15 8192 x 8 sprom?29793 power and ac characteristics over operating range i cc conforms to mil-std-883, group a, subgroups 1, 2 and 3. ac parameters conform to mil-std-883, group a, subgroups 9, 10 and 11. notes: 1. see ac test load circuit and switching waveforms. 2. speeds are based on a minimum of 50% of the array being programmed. 3. t er is guaranteed by design but not performed. ordering information block diagram notes: /883b suffix denotes mil-std-883, level b processing s suffix denotes level s processing d = 24 lead ceramic dip ?.600" body width f = 24 lead leaded chip carrier s = 24 lead sidebrazed ?.300" body width pin assignments parameter description test conditions maximum limits units r29793m i ccd power down, supply current (disabled) v cc = max, ps = v ih , all other inputs = gnd 50 ma i cc supply current (enabled) v cc = max all inputs = gnd 190 ma t aa 2 address access time c l = 30 pf 1 95 ns t ea 2 enable access time r1 = 300 w to v cc 145 ns t er 3 enable recovery time r2 = 600 w to gnd, 16 ma load 30 ns p d power dissipation (disabled) 275 mw p d power dissipation (enabled) 1.05 w part type package operating temperature range r29793dm d -55 c to +125 c r29793dm/883b d -55 c to +125 c r29793dms d -55 c to +125 c r29793fm f -55 c to +125 c r29793fm/883b f -55 c to +125 c r29793fms f -55 c to +125 c r29793sm s -55 c to +125 c r29793sm/883b s -55 c to +125 c r29793sms s -55 c to +125 c 20 19 18 17 24 23 22 21 16 15 14 13 v cc pin 20 is also the programming pin (pp) a 8 a 9 a 10 a 5 a 7 a 6 a 4 a 3 a 2 a 1 o 7 o 8 a 12 a 11 ps a 0 o 1 o 2 o 3 gnd o 6 o 5 o 4 1 24 lead ceramic dip/24 lead leaded chip carrier/ 24 lead sidebrazed 2 3 4 5 6 7 8 9 10 11 12 a 5 3 1 of 256 decoder 256 x 256 memory matrix 1 of 32 multiplexers (8) output drivers (8) 2 1 8 7 6 20 23 22 21 a 6 a 7 a 0 a 1 a 2 5 a 3 4 a 4 a 8 a 9 a 10 19 a 11 18 a 12 o 1 o 2 o 3 o 4 o 5 o 6 o 7 o 8 ps 9 10111314151617
r296xx/r297xx product specification 16 ac test load circuit notes: 1. t aa is tested with switch s 1 closed and c l = 30 pf. 2. t ea is tested with c l = 30 pf; s 1 is open for high impedance to ??test and closed for high impedance to ??test. 3. t er , is tested with c l = 5 pf; s 1 is open for ??to high impedance test and measured at v oh -0.5v output level and is closed for ??to high impedance test and measured at v ol +0.5v output level. switching waveforms v cc c l output s1 r1 300 ? r2 600 ? a 0 ? n 3.0v 1.5v 0v 3.0v 1.5v 0v keys to timing diagram v oh 1.5v v ol t aa t er t ea c s ? s waveforms inputs must be steady will be steady don? care. any change permitted changing state unknown does not apply center line is high impedance off state outputs o 1 ? n
product specification r296xx/r297xx 17 1 2 3 4 5 6 7 8 9 10 f 0 f 1 f 2 f 3 f 4 f 8 f 7 f 6 v cc v bb 2 v cc v bb 2 v cc f 5 f 9 20 19 18 17 16 15 14 13 12 11 dynamic burn-in r29621/621a r29623/623a 1 2 3 4 5 6 7 8 9 10 11 12 f 7 f 6 f 5 f 4 f 3 f 2 f 1 f 0 f 8 f 9 f 10 f 13 f 11 f 12 v cc v bb 2 v cc v bb 2 v cc 24 23 22 21 20 19 18 17 16 15 14 13 dynamic burn-in r29631/631a r29633/633a r29681/681a r29683/683a R29771 r29773 r29791 r29793 1 2 3 4 5 6 7 8 9 f 6 f 5 f 4 f 3 f 0 f 1 f 2 f 10 f 9 f 7 f 8 f 11 v cc v bb 2 v cc 18 17 16 15 14 13 12 11 10 dynamic burn-in r29651/651a r29653/653a dynamic life test/burn-in circuits in accordance with mil-std-883, methods 1005/1015, condition d: t a = 125 +10 c minimum v cc = 5.25 0.25v square wave pulses on f 0 to f n are: 50% 10% duty cycle frequency of each address is to be 1/2 of each preceding input, with f 0 beginning at 100 khz (e.g., f 0 = 100 khz 10%, f 1 = 50 khz 10%, f 2 = 25 khz 10%, fn = 1/2 fn-1 10%, etc.) resistors are optional on input pins (r = 300 10%) ?
r296xx/r297xx product specification 18 1 2 3 4 5 6 7 8 9 v cc 18 17 16 15 14 13 12 11 10 static burn-in r29651/651a r29653/653a 1 2 3 4 5 6 7 8 9 10 v cc 20 19 18 17 16 15 14 13 12 11 static burn-in r29621/621a r29623/623a 1 2 3 4 5 6 7 8 9 10 11 12 v cc 24 23 22 21 20 19 18 17 16 15 14 13 static burn-in r29631/631a r29633/633a r29681/681a r29683/683a R29771 r29773 r29791 r29793 static life test/burn-in circuits in accordance with mil-std-883, methods 1005/1015, condition c: t a = 125 +10 c minimum v cc = 5.25 0.25v resistors are optional on input pins (r = 300 w 10%) ?
product specification r296xx/r297xx 19 programming characteristics programming timing address r296xx series r297xx series strobe v pp v out v cc t pp t p t r t d2 t d1 t r = 0.34v/ s min. ?1.25v/ s max. t pp = 80 s min. ?110 s max. t p = 1 s min. ?40 s max. t d1 = 70 s min. ?90 s max. t d2 = 100 ns min. v pp = 27v min. ?33v max. v out = 20v min. ?26v max. t r = 0.34v/ s min. ?1.25v/ s max. t pp = 70 s min. ?120 s max. t p = 20 s min. ?40 s max. t d1 = 60 s min. ?100 s max. t d2 = 100 ns min. v pp = 26v min. ?28v max. v out = 22v min. ?24v max. notes: output load = 0.2 ma during 6.0v check output load = 12 ma during 4.2v check 6.0v 4.2v 5.5v t r 90% 10% 90% 10% check check v pp ttl high ttl low ttl high ttl low ttl low ttl low device programming inputs if you would like to have fairchild semiconductor program your devices, please submit one of the following: two masters and truth table two masters and checksum in either case, we require customer approval prior to pro- gramming the devices. if you need blank devices in order to supply programming masters, please do not hesitate to contact fairchild semicon- ductor electronics semiconductor division for unpro- grammed samples. commercial programmers (subject to change) equipment must be calibrated at regular intervals. each time a new board or a new programming module is inserted, the whole system should be checked. both timing and voltages must meet published speci?ations for the device. please contact the following manufacturers for equipment information: data i/o corp. 10525 willows road, n.e. p.o. box 97046 redmond, wa 98073-9746 (800) 247-5700 stag microsystems inc. (r296xx series) 1600 wyatt drive, suite 3 santa clara, ca 95054 (408) 988-1118 commercial surface mount socket adapter manufacturer (subject to change) please contact the following manufacturer for equipment information: emulation technology, inc. 2344 walsh avenue, bldg. f santa clara, ca 95051 (408) 982-0660 the companies listed above are not intended to be a complete guide of manufacturers of programmers or adapters, nor does fairchild semiconductor endorse any speci? company.
r296xx/r297xx product specification 20 mechanical dimensions 24 lead cerpack l e q c1 a e b1 s1 d e1 notes: 1. index area: a notch or pin one identification mark shall be shall not be used as a pin one identification mark. 3. this dimension allows for off-center lid, meniscus and glass overrun. 4. all leads - increase maximum limit by .003 (.08mm) measured at the center of the flat, when lead finish is applied. 5. dimension s1 may be .000 (.00mm) minimum if leads number 1, 12, 13 and 24 bend toward the cavity of the package within one lead's width from the point of entry of the lead into the body. located adjacent to pin one. the manufacturer's identification 2. dimension q shall be measured at the point of exit of the lead from the body. note 1 a .045 .090 1.14 2.29 symbol inches min. max. min. max. millimeters notes b1 .015 .019 .38 .48 c1 .004 .006 .10 .15 e .300 .420 7.62 10.67 e .050 bsc 1.27 bsc l .250 .370 6.35 9.40 .026 .045 .66 1.14 .005 .13 5 2 4 3 4 e1 .440 11.18 3 q s1 d .640 16.26
product specification r296xx/r297xx 21 mechanical dimensions (continued) 24 lead leaded chip carrier notes: 1. index area: a notch or a pin one identification mark shall be located adjacent to pin one. the manufacturer's identification mark shall not be used as a pin one identification mark. 2. this dimension allows for off-center lid, meniscus and glass overrun. 3. the basic pin spacing is .050 (1.27mm) between centerlines. each pin centerline shall be located within .005 (.13mm) of its exact longitudinal position relative to pins 1 and 24. 4. all leads - increase maximum limit by .003 (0.08mm) measured at the center of the flat, when finish "a" is applied. 5. twenty-two spaces. 6. applies to all four corners (leads number 1, 12, 13, and 24). d b1 e s1 e e1 l 2 pl e3 2 pl c1 e2 q a e k alternatively, a tab (dim. k) may be used to identify pin one. note 1 a .045 .115 1.14 2.92 symbol inches min. max. min. max. millimeters notes b1 .015 .019 .38 .48 c1 .004 .006 .10 .15 e .350 .420 8.89 10.67 e .050 bsc 1.27 bsc l .250 .370 6.35 9.40 .026 .045 .66 1.14 .000 .00 6 4 2 4 e1 .450 11.43 2 e2 .180 4.57 e3 .030 .76 3, 5 q s1 d .640 16.26
r296xx/r297xx product specification 22 mechanical dimensions (continued) 28 terminal leadless chip carrier notes: 1. the index feature for terminal 1 identification, optical orientation or handling purposes, shall be within the shaded index areas shown on planes 1 and 2. plane 1, terminal 1 identification may be an extension of the length of the metalized terminal which shall not be wider than the b1 dimension. 2. unless otherwise specified, a minimum clearance of .015 inch (0.38mm) shall be maintained between all metallized features (e.g., lid, castellations, terminals, thermal pads, etc.). 3. dimension ? controls the overall package thickness. the maximum ? dimension is the package height before being solder dipped. the corner shape (square, notch, radius, etc.) may vary at the manufacturers option, from that shown on the drawing. the index corner shall be clearly unique. 5. dimension ?3 minimum and ?3 minimum and the appropriately derived castellation length define an unobstructed three dimensional space traversing all of the ceramic layers in which a castellation was designed. dimensions ?3 and ?3 maximum define the maximum width and depth of the castellation at any point on its surface. measurement of these dimensions may be made prior to solder dripping. 6. chip carriers shall be constructed of a minimum of two ceramic layers. 7. symbol ? is the maximum number of terminals. symbol ?d and ?e are the number of terminals along the sides of length ? and ? respectively. e e3 d 4 d3 a1 lid a l2 e d2 detail? detail? d1 plane 1 plane 2 b3 b1 l3 e2 e1 l1 (h) x 45 ? 3 plcs j x 45 ? a .060 .100 1.52 2.54 a1 .050 .088 1.27 2.24 3, 6 3, 6 symbol inches min. max. min. max. millimeters notes b1 .022 .028 .56 .71 b3 .006 .022 .15 .56 d1/e1 e .050 bsc 1.27 bsc h .040 ref 1.02 ref .300 bsc 7.62 bsc .150 bsc 3.81 bsc j .020 ref .51 ref 4 4 5 l1 .045 .055 1.14 1.40 l2 .075 .095 1.91 2.41 l3 .003 .015 .08 .38 77 28 28 7 7 2, 5 2 d2/e2 d3/e3 .460 11.68 nd/ne n d/e .442 .460 11.23 11.68 4
product specification r296xx/r297xx 23 mechanical dimensions (continued) 24 lead sidebrazed ?.300" body width d e a q b2 b1 l e s1 s2 ea c1 note 1 7. all leads - increase maximum limit by .003 (.08mm) measured at the center of the flat when lead finish is applied. 5. applies to all four corners (leads number 1, 12, 13, and 24). 4. the basic pin spacing is .100 (2.54mm) between centerlines. each pin centerline shall be located within .010 (.25mm) of its exact longitudinal position relative to pins 1 and 24. 3. dimension "q" shall be measured from the seating plane to the base plane. 1. index area: a notch or a pin one identification mark shall be located adjacent to pin one. the manufacturer's identification shall not be used as pin one identification mark. 2. the minimum limit for dimension "b2" may be .023 (.58mm) for leads number 1, 12, 13, and 24 only. 8. twenty-two spaces. 6. "ea" shall be measured at the centerline of the leads. a .200 5.08 symbol inches min. max. min. max. millimeters notes b1 .014 .023 .36 .58 c1 .008 .015 .20 .38 d 1.280 32.51 .220 .310 5.59 7.87 e e .100 bsc 2.54 bsc .300 bsc 7.62 bsc 4, 8 6 ea .125 .200 3.18 5.08 .015 .060 .38 1.52 l q s1 .005 .13 3 5 s2 .005 .13 b2 .045 .065 1.14 1.65 7 7 2 notes:
r296xx/r297xx product specification 24 mechanical dimensions (continued) 18 lead ceramic dual inline package (cerdip) 8. all leads - increase maximum limit by .003(.08mm) measured at the center of the flat, when " " is 90 ? . 7. "ea" shall be measured at the center of the lead bends or at the centerline of the leads 6. applies to all four corner's (leads number 1, 8, 9, and 18). pins 1 and 18. shall be located within .010 (.25mm) of its exact longitudinal position relative to 5. the basic pin spacing is .100 (2.54mm) between centerlines. each pin centerline 4. this dimension allows for off-center lid, meniscus and glass overrun. 3. dimension "q" shall be measured from the seating plane to the base plane. one. the manufacturer's identification shall not be used as pin one identification mark. 1. index area: a notch or a pin one identification mark shall be located adjacent to pin a notes: 2. the minimum limit for dimension "b2" may be .023(.58mm) for leads number 1, 8, 9 and 18 only. 9. sixteen spaces. when lead finish is applied. d b2 e b1 e q a l s1 c1 ea a note 1 a .200 5.08 symbol inches min. max. min. max. millimeters notes b1 .014 .023 .36 .58 .065 1.65 b2 .045 1.14 c1 .008 .015 .20 .38 e .220 .310 5.59 7.87 e .100 bsc 2.54 bsc l .125 .200 3.18 5.08 .015 .070 .38 1.78 .005 .13 3 6 8 4 8 2, 8 4 5, 9 ea .300 bsc 7.62 bsc 7 q s1 90 ? 105 ? 90 ? 105 ? a d .960 24.38
product specification r296xx/r297xx 25 mechanical dimensions (continued) 20 lead ceramic dual inline package (cerdip) 8. all leads - increase maximum limit by .003(.08mm) measured at the center of the flat, when " " is 90 ? . 7. "ea" shall be measured at the center of the lead bends or at the centerline of the leads 6. applies to all four corner's (leads number 1, 10, 11, and 20). pins 1 and 20. shall be located within .010 (.25mm) of its exact longitudinal position relative to 5. the basic pin spacing is .100 (2.54mm) between centerlines. each pin centerline 4. this dimension allows for off-center lid, meniscus and glass overrun. 3. dimension "q" shall be measured from the seating plane to the base plane. one. the manufacturer's identification shall not be used as pin one identification mark. 1. index area: a notch or a pin one identification mark shall be located adjacent to pin a notes: 2. the minimum limit for dimension "b2" may be .023(.58mm) for leads number 1, 10, 11 and 20 only. 9. eighteen spaces. when lead finish is applied. d b2 e b1 e q a l s1 c1 ea a note 1 a .200 5.08 symbol inches min. max. min. max. millimeters notes b1 .014 .023 .36 .58 .065 1.65 b2 .045 1.14 c1 .008 .015 .20 .38 e .220 .310 5.59 7.87 e .100 bsc 2.54 bsc l .125 .200 3.18 5.08 .015 .060 .38 1.52 .005 .13 3 6 8 4 8 2, 8 4 5, 9 ea .300 bsc 7.62 bsc 7 q s1 90 ? 105 ? 90 ? 105 ? a d 1.060 25.92
r296xx/r297xx product specification 26 mechanical dimensions (continued) 24 lead ceramic dual inline package (cerdip) ?.600" body width note 1 d s1 b2 e b1 e q a l ea c1 a a .225 5.72 symbol inches min. max. min. max. millimeters notes b1 .014 .023 .36 .58 .065 1.65 b2 .045 1.14 c1 .008 .015 .20 .38 e .500 .610 12.70 15.49 e .100 bsc 2.54 bsc l .120 .200 3.05 5.08 .015 .075 .38 1.91 .005 .13 3 6 8 4 8 2, 8 4 5, 9 ea .600 bsc 15.24 bsc 7 q s1 90 ? 105 ? 90 ? 105 ? a d 1.290 32.77 notes: 1. 2. 3. 4. 5. 6. 7. 8. 9. index area: a notch or a pin one identification mark shall be located adjacent to pin one. the manufacturer's identification shall not be used as pin one identification mark. the minimum limit for dimension "b2" may be .023 (.58mm) for leads number 1, 12, 13 and 24 only. dimension "q" shall be measured from the seating plane to the base plane. this dimension allows for off-center lid, meniscus and glass overrun. the basic pin spacing is .100 (2.54mm) between centerlines. each pin centerline shall be located within .010 (.25mm) of its exact longitudinal position relative to pins 1 and 24. applies to all four corners (leads number 1, 12, 13, and 24). "ea" shall be measured at the center of the lead bends or at the centerline of the leads when " a " is 90 ? . all leads ?increase maximum limit by .003 (.08mm) measured at the center of the flat, when lead finish applied. twenty-two spaces.
product specification r296xx/r297xx 27 mechanical dimensions (continued) 24 lead ceramic dual inline package (cerdip) ?.300" body width a .200 5.08 symbol inches min. max. min. max. millimeters notes b1 .014 .023 .36 .58 .065 1.65 b2 .045 1.14 c1 .008 .015 .20 .38 e .220 .310 5.59 7.87 e .100 bsc 2.54 bsc l .125 .200 3.18 5.08 .015 .060 .38 1.52 .005 .13 3 6 8 4 8 2, 8 4 5, 9 ea .300 bsc 7.62 bsc 7 q s1 90 ? 105 ? 90 ? 105 ? a d 1.280 32.51 notes: 1. 2. 3. 4. 5. 6. 7. 8. 9. index area: a notch or a pin one identification mark shall be located adjacent to pin one. the manufacturer's identification shall not be used as pin one identification mark. the minimum limit for dimension "b2" may be .023 (.58mm) for leads number 1, 12, 13 and 24 only. dimension "q" shall be measured from the seating plane to the base plane. this dimension allows for off-center lid, meniscus and glass overrun. the basic pin spacing is .100 (2.54mm) between centerlines. each pin centerline shall be located within .010 (.25mm) of its exact longitudinal position relative to pins 1 and 24. applies to all four corners (leads number 1, 12, 13, and 24). "ea" shall be measured at the center of the lead bends or at the centerline of the leads when " a " is 90 ? . all leads ?increase maximum limit by .003 (.08mm) measured at the center of the flat, when lead finish applied. twenty-two spaces. note 1 d s1 b2 e b1 e q a l ea c1 a
r296xx/r297xx product specification 5/20/98 0.0m 001 stock#ds3000296xx 1998 fairchild semiconductor corporation life support policy fairchild? products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1 . life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2 . a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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